Advances in semi-conductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple cores and multiple logical processors present on individual integrated circuits. A processor or integrated circuit typically comprises a single processor die, where the processor die may include any number of processing elements, such as cores, threads, and/or logical processors.
In processors with multiple threads, the behavior of one thread potentially affects the behavior of another thread on the same processor core due to sharing of resources and pipelines. Often behavior of one thread creates unfairness in the usage of the shared resources and pipelines. In fact, when one thread's performance significantly changes in relation to other threads on the same core, often a large and unpredictable variability in performance from the unbalanced usage of shared resources occurs.
For example, a reservation unit in a microprocessor is used to buffer instructions with corresponding operands for scheduling on execution units. In an out-of-order (OOO) processor, instructions may be scheduled out of order on execution units; however, some instructions are dependent on other instructions. As a result, when one thread schedules a long latency operation, such as a load operation that misses a cache, instructions that are dependency on the long latency operation reside in the reservation unit, while other threads operations are efficiently de-allocated. This results in the reservation station being monopolized by the thread that scheduled the long latency operation, which potentially adversely affects the ability to other threads on the same core to schedule operations for execution.
In addition, during some stages of a processor pipeline, one thread may cause a stall, which does not allow other threads to continue processing during the stall. This behavior is often referred to as a blocking stall. As a result, one thread's stall potentially adversely affects other threads performance in the pipeline.